Rob Schreiber
Hewlett Packard Labs

Manycores in the Future

The change from single core to multicore processors is expected to continue, taking us to manycore chips (64 processors) and beyond. Cores are more numerous, but not faster. They also may be less reliable. Chip-level parallelism raises important questions about architecture, software, algorithms, and applications. I'll consider the directions in which the architecture may be headed, and look at the impact on parallel programming and scientific computing.

About Rob Schreiber
Rob Schreiber is with the Advanced Architecture Lab at Hewlett Packard Laboratories. He is known for basic research in sequential and parallel algorithms for matrix computation, and compiler optimization for parallel languages. Rob has been a professor of Computer Science at Stanford University and at RPI, was Chief Scientist at Saxpy Computer, and a research scientist at the NASA Ames Research Center. He was a developer of the sparse-matrix extension of Matlab, a leading designer of the High Performance Fortran programming language, and one of the developers of the NAS parallel benchmarks. He wrote the matrix computation libraries at Maspar. At HP, Rob was a technical leader and an implementer of PICO, a tool for hardware synthesis from high-level specifications. His current research is in algorithms and architectures for high-performance computing and data analysis.